(1) Field of the Invention
The present invention pertains to microprocessor controlled computer systems and more particularly to a scheme for interconnecting a large number of peripheral devices to a microprocessor via an interrupt structure.
(2) Description of the Prior Art
In computer control systems it is required that peripheral devices be connected to the central processing unit. Such peripheral devices may comprise keyboards, display devices, teletypewriters, CRT's and various sensors. In operation, these peripheral devices perform a great number of events external to the processing of the central processing unit. These devices must continually receive instructions from the processing unit in order to perform their respective functions.
In order for a central processor to monitor the operation of the peripheral devices a number of sensors are provided which connect the peripheral to the processor. Such sensors describe the present operation of the peripheral device. For example, one sensor may indicate that a data character has been received by a teletypewriter and another sensor may indicate that a teletypewriter is ready to transmit another character to be printed. Still other sensors may indicate various error conditions which a peripheral device may encounter.
One method that a central processing unit may employ to monitor the operation of peripheral devices is called scanning or polling. In this method, the operating program of the central processing unit scans the sensors to determine whether any sensor indicates a state change. For example, a sensor may make a state transition from a logic "0" to a logic "1" indicates that a data character has been received by a teletypewriter or it may indicate some malfunction occurring within the teletypewriter. A sizable portion of such an operating program must scan all such sensors continually at a fixed rate to determine whether any state changes of the sensors have occurred. When a state change is detected subsequent portions of the operating program may be given control to monitor or perform a particular function in response to the state change.
As the number of sensors to be scanned increases, the processor's operating program must spend a great deal of its time interrogating the status of the sensors, although statistically, only a small percentage of the sensors will change state for a given scan cycle. For systems with a large number of sensors such a scheme is inefficient. Therefore, a scheme which would call the operating program only for those occasions upon which a state change of a sensor is detected is highly desirable.
A method of informing the operating program only when a state change occurs is called an interrupt. Thus, the operating program may perform other tasks than simply scanning all the sensors. Thereby the operating program is forced to stop these other tasks only when an interrupt caused by a state change of a sensor occurs. Modern microprocessor technology provides central processing units with an interrupt capability. However, due to packaging limitations only a single interrupt facility is provided by such microprocessors. Typically, such microprocessors include of models 8080, 8085 and 8086 manufactured by the Intel Corporation.
Therefore, the Intel Corporation has provided a Programmable Interrupt Controller device model 8259 which provides for interfacing up to 8 priority interrupts to a microprocessor with a single interrupt capability. This scheme can accommodate up to 8 interrupting sensors. However, a moderate size microprocessor control system may easily require more then 8 interrupting sensors. In order to solve this problem the programmable interrupt controllers have been constructed to be cascadable. In such a configuration, 8 programmable interrupt controllers are connected to a single programmable interrupt controller which is in turn connected to the microprocessor. Such a configuration can provide for up to 64 vector interrupts.
In process control systems, such as telephone processing systems, still larger numbers of interrupting sensors are required. Therefore, it is required that a greater number then 64 vector interrupts be provided in order to efficiently operate such process control systems.
Therefore, it is an object of the present invention to provide a simple, quickly responsive circuit which greatly expands the number of priority vector interrupts to a microprocessor with a single interrupt capability.
It is also an object of the present invention to provide the above mentioned object while providing for the resolution of timing conflicts for multiple simultaneous interrupts.